Senior NPU Architect

Das ist der Job

Establish and maintain collaborations with leading academic institutions and faculty.

Darum lohnt es sich

My client is seeking a highly skilled and innovative Senior NPU Architect to join our advanced research team in Zurich. Demonstrated expertise in at least one of the following areas: Computer architecture and micro‑architecture of modern Intel/ARM/AMD CPUs, Nvidia GPUs, or Google TPUs.

This role focuses on investigating and designing the next generation of Neural Processing Units (NPUs) and CPUs tailored for the agentic AI era.

The ideal candidate will have a strong background in computer architecture and micro‑architecture, a proven track record of research excellence, and a passion for pushing the boundaries of AI hardware design.

Responsibilities NPU Core Micro‑architecture: Research and develop advanced frontend mechanisms, register file organization, issue and wake‑up logic, and scalar, vector, and tensor functional units to optimize throughput and utilization for AI workloads.

NPU Backend and Memory Systems: Investigate backend structures such as TLBs, L1 caches, and scratchpads, along with cache hierarchies and memory systems to ensure high bandwidth and low latency.

Agentic CPU Architecture: Design CPUs optimized for agentic AI, focusing on tool calling, agent‑logic scheduling, and context management alongside accelerator‑bound tasks.

Resilience to Bursty Compute and Context Switching: Develop architectural support for rapid context switching and high thread‑level concurrency, addressing limitations of current designs. Conduct cutting‑edge research and publish findings in top‑tier conferences and journals (e.g., ASPLOS, ISCA, MICRO, HPCA).

Mentor and guide junior researchers and interns to foster their professional growth. Qualifications PhD in Computer Science, Electrical Engineering, or a related field. Strong background in computer architecture and micro‑architecture is essential. Proficiency with computer architecture simulators such as Gem5, ChampSim, Sniper, ZSim, or QFlex.

Knowledge of vector and matrix extensions like ARM SVE/SME or Intel SSE/AVX/AMX. Understanding of GPU programming models, including CUDA kernels and PTX/SASS instructions. Experience with micro‑architecture characterization, profiling, and bottleneck analysis using Performance Monitoring Units (PMUs).

Proven track record of publishing in top‑tier conferences or journals. Strong analytical, problem‑solving, and system‑level thinking abilities. Advanced development and prototyping skills. Excellent interpersonal skills with a collaborative mindset and the ability to work independently.

For more information and to apply, please contact Ane @ IC Resources with your CV and a time for an initial conversation about your background and details of the position! #J-18808-Ljbffr