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Senior Digital ASIC Design Engineer Verification (m/f/d) Böblingen Kennziffer: 8202 Overview Join a global, highly skilled engineering team at the heart of Advantest's cutting edge IC test solutions.
Responsibilities Requirements gathering and elicitation for IP Architecture development for CMOS designs Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases generation with a focus on chip level Documentation of implemented functionality Support for verification methodology Collaboration with other functions Qualifications University degree, Diploma or BS EE Background in digital design (SOC), ASIC design methodologies and silicon development cycle Experience in Register Transfer Level (RTL) coding (Verilog and System-Verilog) Experience with verification methodologies and concepts Experience with standard simulation tools for digital designs Basic knowledge about UNIX or Linux environment and using programming languages Technical communication, teamwork and problem solving skills English language skills #J-18808-Ljbffr As a Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing.
You will work on complex mixed signal ASICs used in Advantest's industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving you true end to end ownership.
In this role, you will collaborate closely with system architects, software engineers, product marketing, and other engineering disciplines. You will translate requirements into robust tests, solve challenging technical problems, and deliver high quality results on schedule and at scale.
