Senior ASIC Design Engineer

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Darum lohnt es sich

To further strengthen our team, we are looking for a hardworking digital design engineer who will be involved in the design of these products, working within a team of digital design engineers, verification engineers and architects.

In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. xayajpt We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

They gather information about your interactions on the site, such as which pages you visit frequently, how long you stay, and the links or buttons you click. They help us record any difficulties you have with the website and help us to evaluate the effectiveness of our advertising.

By analyzing this data, we can understand what aspects of our site are effective and identify areas for improvement. * This is a secondary processing purpose. * This is a secondary processing purpose. * This is a primary processing purpose. * This is a secondary processing purpose.The Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions, and are one of the main contributors to Ciena's success in the telecommunications industry.

Your role as a senior digital design engineer will be to propose innovative solutions, in order to craft power and area optimized functional blocks for the Wavelogic family of products.As lead digital design engineer, you are required to read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects Ability to methodically solve complex technical problems Excellent organization, written and oral (English) communication skills Proficiency above the intermediate level with use of System Verilog for designFamiliarity with digital (including formal) verification methods Experience with digital silicon design backend process Experience with digital design for low power Experience in DSP and/or Forward Error Correction Experience with standards and protocols such as OTN, B100G, Ethernet Experience with mixed-signal design Experience with using Jira for bug tracking and GIT for source code management and revision tracking Familiarity with programming languages such as: Python, Make, bash, object-oriented programming, C, C++, System C **The above lists are intended to describe the general nature and level of work, and they are not intended to be a comprehensive list of all responsibilities, duties and skills required to be qualified and to be performed by the selected candidate.

You will have an opportunity to better understand the role through the interview experience. ** Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business.

Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission.